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[vdso] [vsyscall] heaptrace synctrace iotrace dataraces profile omptrace hwcounters deadlocks frameinfo log.xml map.xml %s=%s %s=%s%s%s SIGPROF SIGIO comment size-limit 0x%lx SYSINFO_EHDR __collector_heap_record dyntext %s/%s $ORIGIN/ ${ORIGIN}/ libc.so.6 setitimer sigaction sigprocmask thr_sigsetmask GLIBC_2.32 pthread_sigmask pthread_create timer_create GLIBC_2.3.3 timer_settime timer_delete timer_gettime periodic p:
INT32
SP_COLLECTOR_PARAMS LD_PRELOAD SP_COLLECTOR_EXPNAME LD_LIBRARY_PATH JAVA_TOOL_OPTIONS %s= __collector_env_allocate -agentlib:gp-collector __collector_env_unset __collector_env_unset, before junk= __collector_env_unset, after __collector_execve gprofng_posix_spawn __collector_posix_spawnp environ array, before env_update at entry __collector_env_update, after fork|exec|combo linetrace
none putenv unsetenv SP_COLLECTOR_PRELOAD SP_COLLECTOR_LIBRARY_PATH SP_COLLECTOR_FOLLOW_SPEC desc_started /usr/lib/pt_chmod .er/_ /%s.er fork_epilogue child at start fork_epilogue child at end fork_epilogue parent at start pid=%d fork_epilogue parent at end err %s __collector_fork start PAPI_br_ins PAPI_br_msp FR_retired_branches_mispred PAPI_br_tkn FR_retired_taken_branches PAPI_fp_ops FP_dispatched_fpu_ops PAPI_fad_ins PAPI_fml_ins PAPI_fpu_idl FP_cycles_no_fpu_ops_retired PAPI_tot_cyc BU_cpu_clk_unhalted PAPI_tot_ins PAPI_l1_dca DC_access PAPI_l1_dcm DC_miss PAPI_l1_ldm DC_refill_from_L2 PAPI_l1_stm PAPI_l1_ica IC_fetch PAPI_l1_icm IC_miss PAPI_l1_icr PAPI_l2_dch PAPI_l2_dcm DC_refill_from_system PAPI_l2_dcr PAPI_l2_dcw PAPI_l2_ich IC_refill_from_L2 PAPI_l2_icm IC_refill_from_system PAPI_l2_ldm PAPI_l2_stm PAPI_res_stl FR_dispatch_stalls PAPI_stl_icy FR_nothing_to_dispatch PAPI_hw_int FR_taken_hardware_intrs PAPI_tlb_dm DC_dtlb_L1_miss_L2_miss PAPI_tlb_im IC_itlb_L1_miss_L2_miss PAPI_l3_dcr L3_read_req PAPI_l3_icr PAPI_l3_tcr PAPI_l3_stm L3_miss PAPI_l3_ldm PAPI_l3_tcm FP_dispatched_fpu_ops_ff LS_seg_reg_load LS_uarch_resync_self_modify LS_uarch_resync_snoop LS_buffer_2_full LS_retired_cflush LS_retired_cpuid DC_misaligned_data_ref DC_uarch_late_cancel_access DC_uarch_early_cancel_access DC_dispatched_prefetch_instr DC_dcache_accesses_by_locks BU_memory_requests BU_data_prefetch IC_itlb_L1_miss_L2_hit IC_uarch_resync_snoop IC_instr_fetch_stall IC_return_stack_hit IC_return_stack_overflow FR_retired_uops FR_retired_far_ctl_transfer FR_retired_resyncs FR_retired_near_rets FR_retired_near_rets_mispred FR_intr_masked_cycles FR_dispatch_stall_fpu_full FR_dispatch_stall_ls_full FR_fpu_exception FR_num_brkpts_dr0 FR_num_brkpts_dr1 FR_num_brkpts_dr2 FR_num_brkpts_dr3 NB_cpu_io_to_mem_io NB_cache_block_commands FP_retired_sse_ops FP_retired_move_ops FP_retired_serialize_ops FP_serialize_ops_cycles DC_copyback DC_dtlb_L1_miss_L2_hit DC_1bit_ecc_error_found DC_dtlb_L1_hit BU_system_read_responses BU_octwords_written_to_system BU_internal_L2_req BU_fill_req_missed_L2 BU_fill_into_L2 IC_eviction IC_cache_lines_invalidate IC_itlb_reload IC_itlb_reload_aborted FR_retired_mmx_sse_fp_instr NB_mem_ctrlr_page_access NB_mem_ctrlr_turnaround NB_thermal_status NB_sized_commands NB_probe_results_upstream_req NB_gart_events NB_ht_bus0_bandwidth NB_ht_bus1_bandwidth NB_ht_bus2_bandwidth NB_ht_bus3_bandwidth LS_locked_operation LS_smi_received LS_ineffective_prefetch LS_global_tlb_flush NB_mem_ctrlr_req CB_cpu_to_dram_req_to_target CB_io_to_dram_req_to_target CB_cpu_req_to_target_0_to_7 L3_l2_eviction_l3_fill L3_eviction PAPI_fp_ins FR_retired_fpu_instr PAPI_vec_ins NB_ECC_errors NB_probe_result NB_sized_blocks SP_COLLECTOR_FOUNDER SP_COLLECTOR_TRACELEVEL repz repnz data16 data32 addr64 addr32 fwait rep xacquire xrelease bnd notrack rex2 addr16 %.*s %st {evex} %%st(%d) 0x%x:0x%x $0x%x,$0x%x %%cr%d dr%d %%db%d %%tr%d eip {1to4} {1to8} {1to16} amd64 intel64 x86-64 i386 i8086 intel -mnemonic addr suffix .byte %#x %s (bad) {%s 0x%x} %s%*s , # lqh hqh GenuineIntel AuthenticAMD ARM Core Microarchitecture counter `%s' is not valid
attribute `%s' is invalid
umask Processor not supported
NULL user edge pc inv {dfv=} {dfv=cf} {dfv=zf} {dfv=zf, cf} {dfv=sf} {dfv=sf, cf} {dfv=sf, zf} {dfv=sf, zf, cf} {dfv=of} {dfv=of, cf} {dfv=of, zf} {dfv=of, zf, cf} {dfv=of, sf} {dfv=of, sf, cf} {dfv=of, sf, zf} {dfv=of, sf, zf, cf} lql hql neq false true eq_uq nge ngt neq_oq lt_oq le_oq unord_s neq_us nlt_uq nle_uq nge_uq ngt_uq false_os neq_os ge_oq gt_oq true_us unord nlt nle pi2fw pi2fd pf2iw pf2id pfnacc pfpnacc pfcmpge pfmin pfrcp pfrsqrt pfsub pfadd pfcmpgt pfmax pfrcpit1 pfrsqit1 pfsubr pfacc pfcmpeq pfmul pfrcpit2 pmulhrw pswapd pavgusb fnop fchs fabs ftst fxam fld1 fldl2t fldl2e fldpi fldlg2 fldln2 fldz f2xm1 fyl2x fptan fpatan fxtract fprem1 fdecstp fincstp fprem fyl2xp1 fsqrt fsincos frndint fscale fsin fcos fucompp fNeni(8087 only) fNdisi(8087 only) fNclex fNinit fNsetpm(287 only) frstpm(287 only) fcompp fNstsw fcom fcomp fdiv fdivr fld fcmovb fcmove fcmovbe fcmovu fcmovnb fcmovne fcmovnbe fcmovnu fucomi fcomi fsub{!M|r} fsub{M|} fdiv{!M|r} fdiv{M|} ffree fst fstp fucom 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%XEvpavgb %XEvpsraw %XEvpavgw %XEvpmulhuw %XEvpmulhw %XEvpsubsb %XEvpsubsw %XEvpminsw vpor%DQ %XEvpaddsb %XEvpaddsw %XEvpmaxsw vpxor%DQ %XEvpsllw %XEvpmaddwd %XEvpsadbwY %XEvpsubb %XEvpsubw %XEvpaddb %XEvpaddw %XEvpshufb %XEvpmaddubsw %XEvpmulhrsw %XEvpermilp%XD %XEvpabsb %XEvpabsw vscalefp%XW vscalefs%XW %XEvpminu%DQ %XEvpmaxsb %XEvpmaxs%DQ %XEvpmaxuw %XEvpmaxu%DQ %XEvpmull%DQ vgetexpp%XW vgetexps%XW vplzcnt%DQ vpsrlv%DQ vpsrav%DQ vpsllv%DQ vrcp14p%XW vrcp14s%XW vrsqrt14p%XW vrsqrt14s%XW vpopcnt%BW vpopcnt%DQ vpexpand%BW vpcompress%BW vpblendm%DQ vblendmp%XW vpblendm%BW vcvt2p%XS2phx vpshldv%DQ vpshrdv%DQ vpermi2%BW vpermi2%DQ vpermi2p%XW vpbroadcastK vpermt2%BW vpermt2%DQ vpermt2p%XW vexpandp%XW vpexpand%DQ vcompressp%XW vpcompress%DQ vperm%BW vpshufbitqmb vpgatherd%DQ vpgatherq%DQ vgatherdp%XW vgatherqp%XW %XEvfmaddsub132p%XW %XEvfmsubadd132p%XW %XEvfmadd132p%XW %XEvfmadd132s%XW %XEvfnmadd132p%XW %XEvfnmadd132s%XW %XEvfnmsub132p%XW %XEvfnmsub132s%XW vpscatterd%DQ vpscatterq%DQ vscatterdp%XW vscatterqp%XW %XEvfmaddsub213p%XW %XEvfmsubadd213p%XW %XEvfmadd213p%XW %XEvfmadd213s%XW %XEvfnmadd213p%XW %XEvfnmadd213s%XW %XEvfnmsub213p%XW %XEvfnmsub213s%XW %XEvfmaddsub231p%XW %XEvfmsubadd231p%XW %XEvfmadd231p%XW %XEvfmadd231s%XW %XEvfmsub231p%XW %XEvfmsub231s%XW %XEvfnmadd231p%XW %XEvfnmadd231s%XW %XEvfnmsub231p%XW %XEvfnmsub231s%XW vpconflict%DQ vexp2p%XW vrcp28p%XW vrcp28s%XW vrsqrt28p%XW vrsqrt28s%XW %XEvaesencY %XEvaesenclastY %XEvaesdecY %XEvaesdeclastY valign%DQ vrndscalep%XD vrndscales%XD %XEvpalignr vpcmpu%DQ vpcmp%DQ vpternlog%DQ vpcmpu%BW vpcmp%BW %XEvpclmulqdqY vrangep%XW vranges%XW vfixupimmp%XW vfixupimms%XW vpshld%DQ vpshrd%DQ %NFaddB %NFaddS %NForB %NForS adcB adcS sbbB sbbS %NFandB %NFandS %NFshldS %NFsubB %NFsubS %NFshrdS %NFxorB %NFxorS %NEccmp%SCB%DF %NEccmp%SCS%DF wrussK %NFimul%ZUS %NEctest%SCB%DF %NEctest%SCS%DF %NFpopcntS movrsB movrsS %NFimulS %NFtzcntS %NFlzcntS movdiri vscalefs%XH vgetexps%XH vrcps%XH vrsqrts%XH vfmaddsub132p%XH vfmsubadd132p%XH vfmadd132s%XH vfmsub132s%XH vfnmadd132s%XH vfnmsub132s%XH vfmaddsub213p%XH vfmsubadd213p%XH vfmadd213s%XH vfmsub213s%XH vfnmadd213s%XH vfnmsub213s%XH vfmaddsub231p%XH vfmsubadd231p%XH vfmadd231s%XH vfmsub231s%XH vfnmadd231s%XH vfnmsub231s%XH %XEvpermilps vpermilpd vtestps vtestpd vcvtph2ps vpermps %XEvbroadcastss vbroadcastf128 vmaskmovps vmaskmovpd vpermd vpsravd %XVvpdpwssd %XVvpdpwssds %XEvpbroadcastd vbroadcasti128 %XVvcvtneps2bf16%XY %XEvpbroadcastb %XEvpbroadcastw %XVvpmadd52luq %XVvpmadd52huq %XEvgf2p8mulb %XEvpermq %XEvpermpd vpblendd vperm2f128 vinsertf128 vextractf128 %XEvcvtps2ph vinserti128 vextracti128 vperm2i128 vblendvps vblendvpd vpblendvb %XEvgf2p8affineqb %XEvgf2p8affineinvqb vpmacssww vpmacsswd vpmacssdql vpmacssdd vpmacssdqh vpmacsww vpmacswd vpmacsdql vpmacsdd vpmacsdqh vpmadcsswd vpmadcswd vprotb vprotw vprotd vprotq vpcomb vpcomw vpcomd vpcomq vpcomub vpcomuw vpcomud vpcomuq vfrczps vfrczpd vphaddbw vphaddbd vphaddbq vphaddwd vphaddwq vphadddq vphaddubw vphaddubd vphaddubq vphadduwd vphadduwq vphaddudq vphsubbw vphsubwd vphsubdq %XEvcvtdq2ps vcvtqq2ps%XY %XEvpunpckldq vpcmpgtd %XEvpunpckhdq %XEvpackssdw %XEvpunpcklqdq %XEvpunpckhqdq vmovdqu32 vmovdqu64 vmovdqa32 vmovdqa64 vmovdqu8 vmovdqu16 %XEvpshufd %MEvpsrld %MEvpsrad vpsraq %MEvpslld %MEvpsrlq %MEvpsllq vpcmpeqd vcvttps2udq vcvttpd2udq%XY vcvttps2uqq vcvttpd2uqq vcvtps2udq vcvtpd2udq%XY vcvtps2uqq vcvtpd2uqq vcvtudq2pd vcvtuqq2pd vcvttps2qq vcvttpd2qq vcvtudq2ps vcvtuqq2ps%XY vcvtps2qq vcvtpd2qq %XEvpsrld %XEvpsrlq %XEvpaddq %XEvpsrad %XEvcvtdq2pd vcvtqq2pd %XEvmovntdq %XEvpslld %XEvpsllq %XEvpmuludq %XEvpsubd %XEvpsubq %XEvpaddd vpmovuswb vpsrlvw vpmovusdb vpsravw vpmovusqb vpsllvw vpmovusdw vpmovusqw vpmovusqd vbroadcastf32x2 %XEvbroadcastsd vbroadcastf32x4 vbroadcastf64x2 vbroadcastf32x8 vbroadcastf64x4 %XEvpabsd vpabsq vpmovswb vpmovsdb vpmovsqb vpmovsdw vpmovsqw vpmovsqd %XEvpmovsxdq %XEvpmuldq vpcmpeqq vpbroadcastmb2qY %XEvmovntdqaY %XEvpackusdw vpmovwb vpmovdb vpmovqb vpmovdw vpmovqw vpmovqd %XEvpmovzxdq vpcmpgtq vpbroadcastmw2dY vbroadcasti32x2 %XEvpbroadcastq vbroadcasti32x4 vbroadcasti64x2 vbroadcasti32x8 vbroadcasti64x4 vpshldvw vpshrdvw vpmultishiftqb vinsertf32x4 vinsertf64x2 vextractf32x4 vextractf64x2 vinsertf32x8 vinsertf64x4 vextractf32x8 vextractf64x4 vshuff32x4 vshuff64x2 vinserti32x4 vinserti64x2 vextracti32x4 vextracti64x2 vinserti32x8 vinserti64x4 vextracti32x8 vextracti64x4 vshufi32x4 vshufi64x2 vpshldw vpshrdw pop2 pop2p uwrmsr urdmsr push2 push2p vcvtdq2ph%XY vcvtqq2ph%XZ vcvttps2udqs vcvttpd2udqs%XY vcvttps2uqqs vcvttpd2uqqs vcvttps2dqs vcvttpd2dqs%XY vcvttps2qqs vcvttpd2qqs vmovw vcvtudq2ph%XY vcvtuqq2ph%XZ vmovmskpX vpmovmskb vpand vpandn vpor vpxor vpsadbw vmaskmovdqu vphaddw vphaddd vphaddsw vphsubw vphsubd vphsubsw vpsignb vpsignw vpsignd vptest vmovntdqa vpminsd vpminud vpmaxsd vpmaxud vpmulld vpmaskmov%DQ vaesenc vaesenclast vaesdec vaesdeclast vroundps vroundpd vroundss vroundsd vblendps vblendpd vpblendw vdpps vpclmulqdq vpermil2ps vpermil2pd vfmaddsubps vfmaddsubpd vfmsubaddps vfmsubaddpd vfmaddps vfmaddpd vfmaddss vfmaddsd vfmsubps vfmsubpd vfmsubss vfmsubsd vfnmaddps vfnmaddpd vfnmaddss vfnmaddsd vfnmsubps vfnmsubpd vfnmsubss vfnmsubsd vpcmov vmovd %XEvpermp%XW %XEvperm%DQ %XEVmovlpYX %XEVmovhpYX %XEvmovYK vzeroupper vzeroall %XEvmovqY %XEvmovK vldmxcsr vstmxcsr %XEvpinsrwY vphminposuw vsha512rnds2 vsha512msg1 vsha512msg2 vsm3msg1 vsm3msg2 vaesimc %XEvpextrb %XEvpextrK %XEvextractps %XEvpinsrbY %XEvinsertpsY %XEvpinsrYK kshiftr%BW kshiftr%DQ kshiftl%BW kshiftl%DQ vdppd vpcmpestrm!%LQ vpcmpestri!%LQ vpcmpistrm vpcmpistri vsm3rnds2 vaeskeygenassist vpperm vfrczss vfrczsd vpshlb vpshlw vpshld vpshlq vpshab vpshaw vpshad vpshaq invept invvpid invpcid sha1nexte sha1msg1 sha1msg2 sha256rnds2 sha256msg1 sha256msg2 pinsrb insertps pinsrK sha1rnds4 pushP popP daa das aaa aas pushaP popaP arplS movs ins{R|} ins{G|} outs{R|} outs{G|} {l|}call{P|} retP ret@ into aam aad callP call@ jmpP jmp@ {l|}jmp{P|} sgdt{Q|Q} sgdt wrmsrlist rdmsrlist pbndkb sidt{Q|Q} sidt eretu erets seamret seamops seamcall lgdt{Q|Q} lgdt lidt{Q|Q} lidt uiret testui clui rmpquery rmpadjust rmpupdate psmash nopQ movZ senduipi %XEcmp%CCxadd lkgsD wrmsrns clac tdcall encls vmmcall vmgexit rstorssp serialize setssbsy xsusldtrk xresldtrk saveprevssp rdpkru wrpkru monitorx mcommit rdpru invlpgb tlbsync pvalidate wbinvd wbnoinvd %XEVmovupX %XEVmovs%XS %XEVmovs%XD movsldup movddup movshdup prefetchit1 prefetchit0 bndcl bndmov bndcu bndcn cvtpi2ps cvtsi2ss{%LQ|} cvtpi2pd cvtsi2sd{%LQ|} movntps movntss movntpd movntsd cvttps2pi cvttpd2pi cvtps2pi cvtpd2pi VucomisYX VcomisYX %XEVsqrtpX %XEVsqrts%XS %XEVsqrts%XD Vrsqrtps Vrsqrtss Vrcpps Vrcpss %XEVaddpX %XEVadds%XS %XEVadds%XD %XEVmulpX %XEVmuls%XS %XEVmuls%XD %XEVcvtp%XS2pd %XEVcvts%XS2sd %XEVcvtp%XD2ps%XY %XEVcvts%XD2ss Vcvtdq2ps Vcvttps2dq Vcvtps2dq %XEVsubpX %XEVsubs%XS %XEVsubs%XD %XEVminpX %XEVmins%XS %XEVmins%XD %XEVdivpX %XEVdivs%XS %XEVdivs%XD %XEVmaxpX %XEVmaxs%XS %XEVmaxs%XD pshufw vmread extrq insertq vmwrite Vhaddpd Vhaddps Vhsubpd Vhsubps montmul sm2 sm3 sm4 rdfsbase rdgsbase wrfsbase wrgsbase ptwrite{%LQ|} lfence incsspK xsaveopt clrssbsy clwb umonitor tpause umwait clflush clflushopt bsfS bsrS VcmppX Vcmpss Vcmpsd vmptrld vmxon vmclear rdrand rdseed rdpid VaddsubpX movq2dq movdq2q Vcvtdq2pd Vcvttpd2dq%XY Vcvtpd2dq%XY movntq Vlddqu maskmovq aesdec128kl aesenc256kl aesdec256kl crc32A crc32Q wrssK adoxL adcxL enqcmds movdir64b enqcmd encodekey128 encodekey256 aadd axor aand aor %XEvmov%XSldup %XEvmov%XDdup %XEvmov%XShdup %XEvcvtsi2ssY{%LQ|} %XEvcvtsi2sdY{%LQ|} %XEvcvttss2si %XEvcvttsd2si %XEvcvtss2si %XEvcvtsd2si kandw kandb kandq kandd kandnw kandnb kandnq kandnd knotw knotb knotq knotd korw korb korq kord kxnorw kxnorb kxnorq kxnord kxorw kxorb kxorq kxord kaddw kaddb kaddq kaddd kunpckwd kunpckbw kunpckdq vmovdqu vmovdqa %XEkmovw %XEkmovb %XEkmovq %XEkmovd %XEkmovK kortestw kortestb kortestq kortestd ktestw ktestb ktestq ktestd ttmmultf32ps ldtilecfg sttilecfg tileloaddrst1 tileloaddrs tilestored tileloaddt1 tileloadd %XEvpdpbuud %XEvpdpbsud %XVvpdpbusd %XEvpdpbssd %XEvpdpbuuds %XEvpdpbsuds %XVvpdpbusds %XEvpdpbssds tdpbuud tdpbsud tdpbusd tdpbssd ttransposed tconjtcmmimfp16ps ttcmmrlfp16ps tconjtfp16 ttcmmimfp16ps ttdpbf16ps ttdpfp16ps t2rpntlvwz0 t2rpntlvwz1 t2rpntlvwz0t1 t2rpntlvwz1t1 vcvtneoph2ps vcvtneebf162ps vcvtneeph2ps vcvtneobf162ps vbcstnebf162ps vbcstnesh2ps %XEvpdpwuud %XEvpdpwsud %XEvpdpwusd %XEvpdpwuuds %XEvpdpwsuds %XEvpdpwusds %XEvsm4key4 %XEvsm4rnds4 %NFandnS %NFbzhiS %XEpextS %XEpdepS %XEmulxS %NFbextrS %XEsarxS %XEshlxS %XEshrxS %XErorxS t2rpntlvwz0rs t2rpntlvwz1rs t2rpntlvwz0rst1 t2rpntlvwz1rst1 tdpbf8ps tdphbf8ps tdphf8ps tdpbhf8ps %XEvucomis%XS vucomxs%XS %XEvucomis%XD vucomxs%XD %XEvcomis%XS vcomxs%XS %XEvcomis%XD vcomxs%XD %XEvcvttp%XS2dq %XEvcvtp%XS2dq %XEvpshufhw %XEvpshuflw vcvttss2usi vcvttsd2usi vcvtss2usi vcvtsd2usi vcvtusi2ssY{%LQ|} vcvtusi2sdY{%LQ|} vcmppX vcmps%XS vcmps%XD %XEvcvttp%XD2dq%XY %XEvcvtp%XD2dq%XY %XEvcvtph2p%XS vprorv%DQ vprolv%DQ %XEvpmovsxbw %XEvpmovsxbd %XEvpmovsxbq %XEvpmovsxwd %XEvpmovsxwq vptestnm%BW vptestm%BW vptestnm%DQ vptestm%DQ vpmovm2Y%BW vpmov%BW2mY %XEvpmovzxbw %XEvpmovzxbd %XEvpmovzxbq %XEvpmovzxwd %XEvpmovzxwq vpmovm2Y%DQ %XEvpminsb vpmov%DQ2mY %XEvpmins%DQ %XEvpminuw tcvtrowd2ps tilemovrow vdpphp%XS vdpbf16p%XS vp4dpws%XSd vp4dpws%XSds vp2intersectY%DQ tcvtrowps2phh tcvtrowps2bf16l tcvtrowps2phl tcvtrowps2bf16h vcvtnep%XS2bf16%XY vcvtne2p%XS2bf16 vcvtbiasp%XH2bf8 vcvtp%XH2bf8%XY vcvt2p%XH2bf8 %XEvfmsub132p%XW v4fmaddp%XS %XEvfmsub132s%XW v4fmadds%XS %XEvfmsub213p%XW v4fnmaddp%XS %XEvfmsub213s%XW v4fnmadds%XS vrndscalep%XH vrndscalep%XS vrndscale%XB vrndscales%XH vrndscales%XS vgetmantp%XH vgetmantp%XW vgetmant%XB vgetmants%XH vgetmants%XW %XEvmpsadbw vdbpsadbw vminmaxp%XH vminmaxp%XW vminmax%XB vminmaxs%XH vminmaxs%XW vreducep%XH vreducep%XW vreduce%XB vreduces%XH vreduces%XW vfpclassp%XH%XZ vfpclassp%XW%XZ vfpclass%XB%XZ vfpclasss%XH vfpclasss%XW vcmpp%XH vcmps%XH vcmp%XB %CFcmov%CCS set%ZU%CC vmovs%XH vcvtbiasp%XH2hf8 vcvtp%XH2hf8%XY vcvt2p%XH2hf8 vcvtbiasp%XH2hf8s vcvtp%XH2hf8s%XY vcvt2p%XH2hf8s vcvtss2s%XH vcvtps2p%XHx%XY vcvthf82p%XH vcvtsi2shY{%LQ|} vcvttsh2si vcvtsh2si vucomisY%XH vucomxs%XH vcomisY%XH vcomxs%XH vcomis%XB vsqrtp%XH vsqrts%XH vsqrt%XB vaddp%XH vadds%XH vadd%XB vmulp%XH vmuls%XH vmul%XB vcvtp%XH2pd vcvts%XH2sd vcvtp%XD2ph%XZ vcvts%XD2sh vcvttp%XH2dq vcvtp%XH2dq vsubp%XH vsubs%XH vsub%XB vminp%XH vmins%XH vmin%XB vdivp%XH vdivs%XH vdiv%XB vmaxp%XH vmaxs%XH vmax%XB vcvttp%XH2ibs vcvttp%XS2ibs vcvtt%XB2ibs vcvtp%XH2ibs vcvtp%XS2ibs vcvt%XB2ibs vcvttp%XH2iubs vcvttp%XS2iubs vcvtt%XB2iubs vcvtp%XH2iubs vcvtp%XS2iubs vcvt%XB2iubs vcvttss2usis vcvttsd2usis vcvttss2sis vcvttsd2sis vmovwY vmovrs%DQ vmovrs%BW vcvtbiasp%XH2bf8s vcvtp%XH2bf8s%XY vcvt2p%XH2bf8s vcvttp%XH2udq vcvttsh2usi vcvttp%XH2uqq vcvtp%XH2udq vcvtsh2usi vcvtp%XH2uqq vcvttp%XH2qq vcvtusi2shY{%LQ|} vcvtp%XH2qq vcvttp%XH2uw vcvttp%XH2w vcvtp%XH2uw vcvtw2p%XH vcvtp%XH2w vcvtuw2p%XH vcvts%XH2ss vcvtp%XH2psx vscalef%XB vscalefp%XH vgetexp%XB vgetexpp%XH vrcp%XB vrcpp%XH vrsqrt%XB vrsqrtp%XH vfmaddcp%XH vfcmaddcp%XH vfmaddcs%XH vfcmaddcs%XH vfmadd132%XB vfmadd132p%XH vfmsub132%XB vfmsub132p%XH vfnmadd132%XB vfnmadd132p%XH vfnmsub132%XB vfnmsub132p%XH vfmadd213%XB vfmadd213p%XH vfmsub213%XB vfmsub213p%XH vfnmadd213%XB vfnmadd213p%XH vfnmsub213%XB vfnmsub213p%XH vfmadd231%XB vfmadd231p%XH vfmsub231%XB vfmsub231p%XH vfnmadd231%XB vfnmadd231p%XH vfnmsub231%XB vfnmsub231p%XH vfmulcp%XH vfcmulcp%XH vfmulcs%XH vfcmulcs%XH xabort xbeginT enclv vmcall vmlaunch vmresume vmxoff pconfig stac xgetbv xsetbv vmfunc xend xtest enclu vmrun vmload vmsave stgi clgi skinit invlpga swapgs rdtscp mwaitx clzero endbr64 endbr32 mfence sfence hreset tilerelease tilezero bound{S|} lesS ldsS invlpg %XEVmovhlpY%XS %XEVmovlhpY%XS prefetcht1 prefetcht2 prefetchrst2 bndldx bndstx bndmk fxsave fxrstor vmptrst aesenc128kl loadiwkey %NEmovbeS adcA sbbA cmpA adcQ sbbQ cmpQ pop{P|} %NFrolA %NFrorA rclA rcrA %NFshlA %NFshrA %NFsarA %NFrolQ %NFrorQ rclQ rcrQ %NFshlQ %NFshrQ %NFsarQ movA movQ testA notA testQ notQ call{@|} {l|}call^ jmp{@|} {l|}jmp^ push{P|} sldtD strD lldtD ltrD verrD verwD smswD lmsw prefetchw prefetchwt1 cldemote rdsspK aesencwide128kl aesdecwide128kl aesencwide256kl aesdecwide256kl xsha1 xsha256 xsha384 xsha512 xstore-rng xcrypt-ecb xcrypt-cbc xcrypt-ctr xcrypt-cfb xcrypt-ofb xrng2 btQ btsQ btrQ btcQ cmpxchg8b xrstors xsavec xsaves vpsrldq vpslldq %NFblsrS %NFblsmskS %NFblsiS blcfill blsfill blcs tzmsk blcic blsic t1mskc blcmsk blci llwpcb slwpcb lwpins lwpval %MEvpsrlw %MEvpsraw %MEvpsllw vpror%DQ vprol%DQ %MEvpsrldqY %MEvpslldqY vgatherpf0dp%XW vgatherpf1dp%XW vscatterpf0dp%XW vscatterpf1dp%XW vgatherpf0qp%XW vgatherpf1qp%XW vscatterpf0qp%XW vscatterpf1qp%XW %NFaddA %NForA %NFandA %NFsubA %NFxorA %NEccmp%SCA%DF %NFaddQ %NForQ %NFandQ %NFsubQ %NFxorQ %NEccmp%SCQ%DF %NEctest%SCA%DF %NFnegA %NFmulA %NFimulA %NFdivA %NFidivA %NEctest%SCQ%DF %NFnegQ %NFmulQ %NFimulQ %NFdivQ %NFidivQ %NFincA %NFdecA %NFincQ %NFdecQ {rn- {rd- {ru- {rz- cmpB cmpS inc{S|} dec{S|} push!P pop!P ins{b|} outs{b|} joH jnoH jbH jaeH jeH jneH jbeH jaH jsH jnsH jpH jnpH jlH jgeH jleH jgH testB testS movB movS movD leaS cW{t|}R cR{t|}O pushfP popfP sahf lahf mov%LB mov%LS movs{b|} movs{R|} cmps{b|} cmps{R|} stosB stosS lodsB lodsS scasB scasS mov%LV enterP leaveP {l|}ret{|f}%LP int3 iret%LP xlat loopneFH loopeFH loopFH jEcxzH inB inG outB outG int1 hlt cmc clc stc cli sti cld larS lslS syscall clts sysret%LQ ud2 femms movlpX movhpX rdtsc rdpmc sysenter sysexit%LQ getsec cmovoS cmovnoS cmovbS cmovaeS cmoveS cmovneS cmovbeS cmovaS cmovsS cmovnsS cmovpS cmovnpS cmovlS cmovgeS cmovleS cmovgS seto setno setb setae sete setne setbe seta sets setns setp setnp setl setge setle setg btS rsm btsS cmpxchgB cmpxchgS lssS btrS lfsS lgsS movz{bR|x} movz{wR|x} ud1S btcS movs{bR|x} movs{wR|x} xaddB xaddS movntiS pinsrw bswap ud0S rex rex.B rex.X rex.XB rex.R rex.RB rex.RX rex.RXB rex.W rex.WB rex.WX rex.WXB rex.WR rex.WRB rex.WRX rex.WRXB AMD Family 11h AMD Family 15h Model 01h AMD Family 15h Model 02h AMD Family 15h Model 03h Pentium 4 with HyperThreading Pentium 4 Pentium Pro, Pentium II Pentium with MMX Pentium Intel Arch PerfMon SPARC64 III SPARC64 V SPARC64 VI SPARC64 VI & VII SPARC64 X SPARC64 XII UltraSPARC T1 UltraSPARC T2 UltraSPARC T2+ SPARC T3 SPARC T4 SPARC M4 SPARC T5 SPARC M5 SPARC T6 SPARC M6 SPARC T7 SPARC 3e40 SPARC M7 SPARC 3e50 UltraSPARC IV+ UltraSPARC IV UltraSPARC IIIi UltraSPARC IIIi & IIIi+ UltraSPARC III+ UltraSPARC III+ & IV UltraSPARC III UltraSPARC I&II unhalted-core-cycles unhalted-reference-cycles llc-reference llc-misses branch-instruction-retired branch-misses-retired ld_blocks.store_forward ld_blocks.no_sr dtlb_load_misses.walk_pending dtlb_load_misses.walk_active dtlb_load_misses.stlb_hit int_misc.recovery_cycles int_misc.recovery_cycles_any int_misc.clear_resteer_cycles uops_issued.any uops_issued.stall_cycles uops_issued.slow_lea arith.divider_active l2_rqsts.demand_data_rd_miss l2_rqsts.rfo_miss l2_rqsts.code_rd_miss l2_rqsts.all_demand_miss l2_rqsts.pf_miss l2_rqsts.miss l2_rqsts.demand_data_rd_hit l2_rqsts.rfo_hit l2_rqsts.code_rd_hit l2_rqsts.pf_hit l2_rqsts.all_demand_data_rd l2_rqsts.all_rfo l2_rqsts.all_code_rd l2_rqsts.all_pf l2_rqsts.references longest_lat_cache.reference longest_lat_cache.miss cpu_clk_unhalted.thread_p cpu_clk_unhalted.thread_p_any cpu_clk_unhalted.ring0_trans cpu_clk_unhalted.ref_p l1d_pend_miss.pending l1d_pend_miss.pending_cycles l1d_pend_miss.fb_full dtlb_store_misses.walk_active dtlb_store_misses.stlb_hit load_hit_pre.sw_pf ept.walk_pending l1d.replacement tx_mem.abort_conflict tx_mem.abort_capacity tx_exec.misc1 tx_exec.misc2 tx_exec.misc3 tx_exec.misc4 tx_exec.misc5 rs_events.empty_cycles rs_events.empty_end idq.mite_uops idq.mite_cycles idq.dsb_uops idq.dsb_cycles idq.ms_dsb_cycles idq.all_dsb_cycles_4_uops idq.all_dsb_cycles_any_uops idq.ms_mite_uops idq.all_mite_cycles_4_uops idq.all_mite_cycles_any_uops idq.ms_uops idq.ms_cycles idq.ms_switches icache_16b.ifdata_stall icache_64b.iftag_hit icache_64b.iftag_miss icache_64b.iftag_stall itlb_misses.walk_completed_4k itlb_misses.walk_completed_1g itlb_misses.walk_completed itlb_misses.walk_pending itlb_misses.walk_active itlb_misses.stlb_hit ild_stall.lcp idq_uops_not_delivered.core uops_dispatched_port.port_0 uops_dispatched_port.port_1 uops_dispatched_port.port_2 uops_dispatched_port.port_3 uops_dispatched_port.port_4 uops_dispatched_port.port_5 uops_dispatched_port.port_6 uops_dispatched_port.port_7 resource_stalls.any resource_stalls.sb cycle_activity.cycles_l2_miss cycle_activity.cycles_l3_miss cycle_activity.stalls_total cycle_activity.stalls_l2_miss cycle_activity.stalls_l3_miss cycle_activity.cycles_mem_any cycle_activity.stalls_mem_any exe_activity.1_ports_util exe_activity.2_ports_util exe_activity.3_ports_util exe_activity.4_ports_util exe_activity.bound_on_stores lsd.uops lsd.cycles_active lsd.cycles_4_uops itlb.itlb_flush offcore_requests.demand_rfo offcore_requests.all_data_rd offcore_requests.all_requests uops_executed.thread uops_executed.stall_cycles uops_executed.core uops_executed.x87 tlb_flush.dtlb_thread tlb_flush.stlb_any inst_retired.any_p other_assists.any uops_retired.stall_cycles uops_retired.total_cycles uops_retired.retire_slots machine_clears.count machine_clears.smc br_inst_retired.all_branches br_inst_retired.conditional br_inst_retired.near_call br_inst_retired.near_return br_inst_retired.not_taken br_inst_retired.near_taken br_inst_retired.far_branch br_misp_retired.all_branches br_misp_retired.conditional br_misp_retired.near_call br_misp_retired.near_taken hle_retired.start hle_retired.commit hle_retired.aborted hle_retired.aborted_mem hle_retired.aborted_timer hle_retired.aborted_memtype hle_retired.aborted_events rtm_retired.start rtm_retired.commit rtm_retired.aborted rtm_retired.aborted_mem rtm_retired.aborted_timer rtm_retired.aborted_memtype rtm_retired.aborted_events fp_assist.any hw_interrupts.received rob_misc_events.lbr_inserts mem_inst_retired.lock_loads mem_inst_retired.split_loads mem_inst_retired.split_stores mem_inst_retired.all_loads mem_inst_retired.all_stores mem_load_retired.l1_hit mem_load_retired.l2_hit mem_load_retired.l3_hit mem_load_retired.l1_miss mem_load_retired.l2_miss mem_load_retired.l3_miss mem_load_retired.fb_hit mem_load_misc_retired.uc baclears.any l2_trans.l2_wb l2_lines_in.all l2_lines_out.silent l2_lines_out.non_silent l2_lines_out.useless_hwpf sq_misc.split_lock misalign_mem_ref.loads misalign_mem_ref.stores dtlb_load_misses.stlb_hit_4k dtlb_load_misses.stlb_hit_2m int_misc.rat_stall_cycles uops_issued.flags_merge uops_issued.single_mul uops_issued.core_stall_cycles arith.fpu_div_active l2_rqsts.l2_pf_miss l2_rqsts.l2_pf_hit l2_demand_rqsts.wb_hit l1d_pend_miss.occurences dtlb_store_misses.stlb_hit_4k dtlb_store_misses.stlb_hit_2m load_hit_pre.hw_pf ept.walk_cycles tx_mem.abort_capacity_write cpl_cycles.ring0 cpl_cycles.ring0_trans cpl_cycles.ring123 idq.empty idq.ms_dsb_uops idq.ms_dsb_occur idq.mite_all_uops icache.hit icache.misses icache.ifdata_stall itlb_misses.walk_duration itlb_misses.stlb_hit_4k itlb_misses.stlb_hit_2m ild_stall.iq_full br_inst_exec.all_conditional br_inst_exec.all_direct_jmp br_inst_exec.all_branches br_misp_exec.all_conditional br_misp_exec.all_branches uops_executed_port.port_0 uops_executed_port.port_1 uops_executed_port.port_2 uops_executed_port.port_3 uops_executed_port.port_4 uops_executed_port.port_5 uops_executed_port.port_6 uops_executed_port.port_7 resource_stalls.rs resource_stalls.rob page_walker_loads.dtlb_l1 page_walker_loads.itlb_l1 page_walker_loads.dtlb_l2 page_walker_loads.itlb_l2 page_walker_loads.dtlb_l3 page_walker_loads.itlb_l3 page_walker_loads.dtlb_memory page_walker_loads.itlb_memory inst_retired.x87 other_assists.avx_to_sse other_assists.sse_to_avx other_assists.any_wb_assist uops_retired.all machine_clears.cycles machine_clears.maskmov br_inst_retired.near_call_r3 fp_arith_inst_retired.scalar fp_arith_inst_retired.double fp_arith_inst_retired.single fp_arith_inst_retired.packed hle_retired.aborted_misc1 hle_retired.aborted_misc2 hle_retired.aborted_misc3 hle_retired.aborted_misc4 hle_retired.aborted_misc5 rtm_retired.aborted_misc1 rtm_retired.aborted_misc2 rtm_retired.aborted_misc3 rtm_retired.aborted_misc4 rtm_retired.aborted_misc5 fp_assist.x87_output fp_assist.x87_input fp_assist.simd_output fp_assist.simd_input mem_uops_retired.lock_loads mem_uops_retired.lock_stores mem_uops_retired.split_loads mem_uops_retired.split_stores mem_uops_retired.all_loads mem_uops_retired.all_stores mem_load_uops_retired.l1_hit mem_load_uops_retired.l2_hit mem_load_uops_retired.l3_hit mem_load_uops_retired.l1_miss mem_load_uops_retired.l2_miss mem_load_uops_retired.l3_miss mem_load_uops_retired.hit_lfb l2_trans.demand_data_rd l2_trans.rfo l2_trans.code_rd l2_trans.all_pf l2_trans.l1d_wb l2_trans.l2_fill l2_trans.all_requests l2_lines_in.i l2_lines_in.s l2_lines_in.e l2_lines_out.demand_clean idq.ms_mite_cycles inst_retired.prec_dist l2_lines_out.demand_dirty uops_issued.sIngle_mul fp_comp_ops_exe.x87 simd_fp_256.packed_single simd_fp_256.packed_double arith.fpu_div l2_rqsts.rfo_hits l2_store_lock_rqsts.miss l2_store_lock_rqsts.hit_m l2_store_lock_rqsts.all l2_l1d_wb_rqsts.miss l2_l1d_wb_rqsts.hit_e l2_l1d_wb_rqsts.hit_m l2_l1d_wb_rqsts.all l1d_pend_miss.occurrences idq.ms_dsb_activations idq.all_dsb_uops idq.all_dsb_cycles idq.all_mite_uops idq.all_mite_cycles idq.mite_all_cycles br_inst_exec.nontaken_cond br_inst_exec.taken_cond br_inst_exec.taken_direct_jmp br_misp_exec.nontaken_cond br_misp_exec.taken_cond dsb2mite_switches.count dsb_fill.exceed_dsb_lines other_assists.avx_store uops_retired.active_cycles br_misp_retired.not_taken br_misp_retired.taken mem_load_uops_retired.llc_hit l2_lines_out.pf_clean l2_lines_out.pf_dirty l2_lines_out.dirty_all ld_blocks.data_unknown ld_blocks.all_block insts_written_to_iq.insts l2_store_lock_rqsts.hit_e l2_l1d_wb_rqsts.hit_s hw_pre_req.dl1_miss l1d.allocated_in_m l1d.eviction l1d.all_m_replacement resource_stalls2.all_fl_empty resource_stalls2.bob_full resource_stalls2.ooo_rsrc cpl_cycles.ring0_transition br_inst_exec.all_cond br_misp_exec.all_cond resource_stalls.lb resource_stalls.fcsw resource_stalls.mxcsr resource_stalls.other dsb_fill.other_cancel dsb_fill.all_cancel uops_dispatched.thread uops_dispatched.stall_cycles uops_dispatched.core agu_bypass_cancel.count sb_drain.any store_blocks.at_ret store_blocks.l1d_block partial_address_alias dtlb_load_misses.any dtlb_load_misses.pde_miss mem_inst_retired.loads mem_inst_retired.stores mem_store_retired.dtlb_miss uops_issued.stalled_cycles uops_issued.fused mem_uncore_retired.local_dram fp_comp_ops_exe.mmx fp_comp_ops_exe.sse_fp fp_comp_ops_exe.sse2_integer fp_comp_ops_exe.sse_fp_packed fp_comp_ops_exe.sse_fp_scalar simd_int_128.packed_mpy simd_int_128.packed_shift simd_int_128.pack simd_int_128.unpack simd_int_128.packed_logical simd_int_128.packed_arith simd_int_128.shuffle_move load_dispatch.rs load_dispatch.rs_delayed load_dispatch.mob load_dispatch.any arith.cycles_div_busy arith.mul inst_queue_writes inst_decoded.dec0 two_uop_insts_decoded inst_queue_write_cycles lsd_overflow l2_rqsts.ld_hit l2_rqsts.ld_miss l2_rqsts.loads l2_rqsts.rfos l2_rqsts.ifetch_hit l2_rqsts.ifetch_miss l2_rqsts.ifetches l2_rqsts.prefetch_hit l2_rqsts.prefetch_miss l2_rqsts.prefetches l2_data_rqsts.demand.i_state l2_data_rqsts.demand.s_state l2_data_rqsts.demand.e_state l2_data_rqsts.demand.m_state l2_data_rqsts.demand.mesi l2_data_rqsts.prefetch.mesi l2_data_rqsts.any l2_write.rfo.i_state l2_write.rfo.s_state l2_write.rfo.m_state l2_write.rfo.hit l2_write.rfo.mesi l2_write.lock.i_state l2_write.lock.s_state l2_write.lock.e_state l2_write.lock.m_state l2_write.lock.hit l2_write.lock.mesi l1d_wb_l2.i_state l1d_wb_l2.s_state l1d_wb_l2.e_state l1d_wb_l2.m_state l1d_wb_l2.mesi l3_lat_cache.miss l3_lat_cache.reference l1d_cache_ld.i_state l1d_cache_ld.s_state l1d_cache_ld.e_state l1d_cache_ld.m_state l1d_cache_ld.mesi l1d_cache_st.s_state l1d_cache_st.e_state l1d_cache_st.m_state l1d_cache_lock.hit l1d_cache_lock.s_state l1d_cache_lock.e_state l1d_cache_lock.m_state l1d_all_ref.any l1d_all_ref.cacheable dtlb_misses.any dtlb_misses.walk_completed dtlb_misses.stlb_hit dtlb_misses.pde_miss load_hit_pre l1d_prefetch.requests l1d_prefetch.miss l1d_prefetch.triggers l1d.repl l1d.m_repl l1d.m_evict l1d.m_snoop_evict l1d_cache_lock_fb_hit cache_lock_cycles.l1d_l2 cache_lock_cycles.l1d io_transactions l1i.hits l1i.misses l1i.reads l1i.cycles_stalled large_itlb.hit itlb_misses.any ild_stall.mru ild_stall.regen ild_stall.any br_inst_exec.cond br_inst_exec.direct br_inst_exec.non_calls br_inst_exec.return_near br_inst_exec.direct_near_call br_inst_exec.near_calls br_inst_exec.taken br_inst_exec.any br_misp_exec.cond br_misp_exec.direct br_misp_exec.non_calls br_misp_exec.return_near br_misp_exec.direct_near_call br_misp_exec.near_calls br_misp_exec.taken br_misp_exec.any resource_stalls.load resource_stalls.rs_full resource_stalls.store resource_stalls.rob_full resource_stalls.fpcw macro_insts.fusions_decoded baclear_force_iq lsd.cycles uops_executed.port0 uops_executed.port1 uops_executed.port2_core uops_executed.port3_core uops_executed.port4_core uops_executed.port5 uops_executed.port015 uops_executed.port234 offcore_requests_sq_full snoop_response.hit snoop_response.hite snoop_response.hitm inst_retired.mmx uops_retired.any uops_retired.macro_fused machine_clears.mem_order itlb_miss_retired mem_load_retired.l1d_hit mem_load_retired.llc_miss mem_load_retired.hit_lfb mem_load_retired.dtlb_miss fp_mmx_trans.to_fp fp_mmx_trans.to_mmx fp_mmx_trans.any macro_insts.decoded uops_decoded.ms uops_decoded.esp_folding uops_decoded.esp_sync rat_stalls.flags rat_stalls.registers rat_stalls.rob_read_port rat_stalls.scoreboard rat_stalls.any seg_rename_stalls es_reg_renames uop_unfusion br_inst_decoded bpu_missed_call_ret baclear.clear baclear.bad_target bpu_clears.early bpu_clears.late l2_transactions.load l2_transactions.rfo l2_transactions.ifetch l2_transactions.prefetch l2_transactions.l1d_wb l2_transactions.fill l2_transactions.wb l2_transactions.any l2_lines_in.s_state l2_lines_in.e_state l2_lines_in.any l2_lines_out.prefetch_clean l2_lines_out.prefetch_dirty l2_lines_out.any sq_full_stall_cycles fp_assist.all fp_assist.output fp_assist.input simd_int_64.packed_mpy simd_int_64.packed_shift simd_int_64.pack simd_int_64.unpack simd_int_64.packed_logical simd_int_64.packed_arith simd_int_64.shuffle_move load_block.overlap_store misalign_mem_ref.store dtlb_load_misses.walk_cycles dtlb_misses.walk_cycles itlb_misses.walk_cycles offcore_requests.demand.rfo offcore_requests.any.read offcore_requests.any.rfo offcore_requests.any snoopq_requests.code snoopq_requests.data snoopq_requests.invalidate uops_decoded.stall_cycles thread_active sq_misc.lru_hints store_forwards.good segment_reg_loads.any prefetch.prefetcht0 prefetch.sw_l2 prefetch.prefetchnta data_tlb_misses.dtlb_miss_ld data_tlb_misses.dtlb_miss_st data_tlb_misses.dtlb_miss page_walks.cycles x87_comp_ops_exe.any.s x87_comp_ops_exe.any.ar fp_assist fp_assist.ar div.s div.ar l2_ads l2_dbus_busy l2_lines_in l2_m_lines_in l2_lines_out l2_m_lines_out l2_ifetch l2_ld l2_st l2_lock l2_rqsts l2_rqsts.self.demand.i_state l2_rqsts.self.demand.mesi l2_reject_busq l2_no_req eist_trans thermal_trip cpu_clk_unhalted.core_p cpu_clk_unhalted.bus cpu_clk_unhalted.no_other l1d_cache.ld l1d_cache.st bus_request_outstanding bus_bnr_drv bus_drdy_clocks bus_lock_clocks bus_data_rcv bus_trans_brd bus_trans_rfo bus_trans_wb bus_trans_ifetch bus_trans_inval bus_trans_pwr bus_trans_p bus_trans_io bus_trans_def bus_trans_burst bus_trans_mem bus_trans_any ext_snoop bus_hit_drv bus_hitm_drv busq_empty snoop_stall_drv bus_io_wait icache.accesses itlb.misses itlb.flush macro_insts.cisc_decoded macro_insts.all_decoded simd_uops_exec.s simd_uops_exec.ar simd_sat_uop_exec.s simd_sat_uop_exec.ar simd_uop_type_exec.mul.s simd_uop_type_exec.shift.s simd_uop_type_exec.pack.s simd_uop_type_exec.unpack.s simd_uop_type_exec.logical.s simd_uop_type_exec.mul.ar simd_uop_type_exec.shift.ar simd_uop_type_exec.pack.ar simd_uop_type_exec.unpack.ar simd_uop_type_exec.logical.ar br_inst_retired.any br_inst_retired.pred_taken br_inst_retired.mispred_taken br_inst_retired.mispred br_inst_retired.taken br_inst_retired.any1 simd_inst_retired.vector simd_inst_retired.any hw_int_rcv simd_assist simd_instr_retired simd_sat_instr_retired bogus_br load_block load_block.sta load_block.std load_block.until_retire load_block.l1d store_block store_block.drain_cycles store_block.order store_block.snoop misalign_mem_ref segment_reg_loads sse_pre_exec sse_pre_exec.nta sse_pre_exec.l1 sse_pre_exec.l2 sse_pre_exec.stores dtlb_misses dtlb_misses.miss_ld dtlb_misses.l0_miss_ld dtlb_misses.miss_st memory_disambiguation memory_disambiguation.reset memory_disambiguation.success page_walks page_walks.count fp_comp_ops_exe idle_during_div delayed_bypass delayed_bypass.fp delayed_bypass.simd delayed_bypass.load l2_dbus_busy_rd l1d_cache_ld l1d_cache_st l1d_cache_lock l1d_cache_lock.duration l1d_all l1d_all_ref l1d_all.ref l1d_all.cache_ref l1d_repl l1d_m_repl l1d_m_evict l1d_pend_miss l1d_split l1d_split.loads l1d_split.stores sse_pre_miss sse_pre_miss.nta sse_pre_miss.l1 sse_pre_miss.l2 l1d_prefetch cmp_snoop l1i_reads l1i_misses itlb itlb.small_miss itlb.large_miss inst_queue inst_queue.full cycles_l1i_mem_stalled ild_stall br_inst_exec br_missp_exec br_bac_missp_exec br_cnd_exec br_cnd_missp_exec br_ind_exec br_ind_missp_exec br_ret_exec br_ret_missp_exec br_ret_bac_missp_exec br_call_exec br_call_missp_exec br_ind_call_exec br_tkn_bubble_1 br_tkn_bubble_2 rs_uops_dispatched rs_uops_dispatched_port rs_uops_dispatched_port.0 rs_uops_dispatched_port.1 rs_uops_dispatched_port.2 rs_uops_dispatched_port.3 rs_uops_dispatched_port.4 rs_uops_dispatched_port.5 macro_insts esp esp.synch esp.additions simd_uops_exec simd_sat_uop_exec simd_uop_type_exec simd_uop_type_exec.mul simd_uop_type_exec.shift simd_uop_type_exec.pack simd_uop_type_exec.unpack simd_uop_type_exec.logical simd_uop_type_exec.arithmetic inst_retired.other inst_retired.vm_h x87_ops_retired x87_ops_retired.fxch x87_ops_retired.any uops_retired uops_retired.ld_ind_br uops_retired.std_sta uops_retired.macro_fusion uops_retired.fused uops_retired.non_fused machine_nukes machine_nukes.smc machine_nukes.mem_order br_inst_retired br_inst_retired_mispred cycles_int cycles_int.masked cycles_int.pending_and_masked simd_inst_retired simd_comp_inst_retired mem_load_retired mem_load_retired.l1d_miss mem_load_retired.l2_line_miss fp_mmx_trans rat_stalls rat_stalls.partial_cycles rat_stalls.fpsw seg_rename_stalls.es seg_rename_stalls.ds seg_rename_stalls.fs seg_rename_stalls.gs seg_rename_stalls.any seg_reg_renames seg_reg_renames.es seg_reg_renames.ds seg_reg_renames.fs seg_reg_renames.gs seg_reg_renames.any resource_stalls resource_stalls.ld_st resource_stalls.br_miss_clear baclears pref_rqsts_up pref_rqsts_dn branch-instructions branch-misses bus-cycles cache-misses cache-references ref-cycles stalled-cycles-backend stalled-cycles-frontend alignment-faults context-switches cpu-clock cpu-migrations emulation-faults major-faults minor-faults page-faults task-clock L1-dcache-load-misses L1-dcache-loads L1-dcache-store-misses L1-dcache-stores L1-icache-load-misses L1-icache-loads dTLB-load-misses dTLB-loads iTLB-load-misses iTLB-loads gc_start gc_end jdynclasses %s/%s/%s.class __collector_jsync_begin __collector_jsync_end JVMTI 1.0
jthread_start jthread_end j: H: start_data_collection() h:* hwc_default setting <%s %s="1"/>
h: UINT64 hwcounter /metadata. fprintf open64 pwrite pwrite64 lseek mkdir opendir closedir waitpid sched_getcpu getcontext malloc getenv mktime gmtime_r strtol strtoll atof fopen fclose pclose fgets sscanf vsnprintf atoi calloc strdup strerror strerror_r strspn strtoul strtoull fcntl ioctl symlink sysconf sigfillset SP_COLLECTOR_EXPNAME=%s sample (fork) SP_COLLECTOR_ORIGIN_COLLECT SP_COLLECTOR_FOUNDER=0
2.44 %s
/proc/cpuinfo cpu MHz
/proc/self/cwd
%s
archives overview ;t: ;S: sample_signal
pause_signal libgp-heap.so libgp-sync.so libgp-iotrace.so sample_period
terminate delay_start collector_open_experiment collector_close_experiment /bin/gprofng-archive -n -a archive.log --outfile LD_PRELOAD_32 LD_PRELOAD_64 No archive command run _exit _Exit __collector_module_init __collector_register_module collector_resume_experiment collector_pause(%s) collector_resume /proc/self/maps P%ld,L%02lu,t%02lu %u.%09u : XXX desc_start mmap-failed exec_start suspend_for_exec %s_C%d %s_f%d rc=%d exec_error *jclasses %s
__collector_clearenv(): ERROR: %s
umask %03o ruid %d->%d
umask %03o euid %d->%d
umask %03o rgid %d->%d
umask %03o egid %d->%d
See Chapter 10 of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD Opteron Processors,"
AMD publication #26094 See section 3.15 of the "BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors,"
AMD publication #31116 error memmgr not_implemented()
__collector_exp_dir_name==NULL
iolib unknown file desc %s
%s
%s: create_handle
create_handle: COL_ERROR_LOG_OPEN %s: %s
MAP_ANON (for %s); create_handle
create_handle: can't mmap MAP_ANON (for %s): %s
../../../gprofng/libcollector/envmgmt.c __collector_strlen (ev) + 1 == strsz t=%lu, %s: open-retries-failed=%d, %3.6f ms.; remap
t=%lu, %s: remap
t=%ld, %s: open-retries=%d, %3.6f ms.; remap
%s: remap
%ld blocks (each %ld bytes)
MAP_ANON (for %s)
couldn't release chunk CAS lock (%s)
timeout allocating chunk for %s
%s: mapBuffer
%s: %s
MAXDYN=%d
MAXVSYSFUNCS=%d
%d -> %d
%p
%d->%d
%d
TSD key not created
itimer could not be set
new_env_size <= new_env_alloc_sz __collector_strlen (ev) + 1 == sz env_update after SP_ENV settings env_update after LD_LIBRARY_PATH settings env_update after LD_PRELOAD settings env_update after JAVA_TOOL settings __collector_env_update, before
../../../gprofng/libcollector/linetrace.c __collector_strlen (instring) + 1 == basedir_sz + additional_sz fork_epilogue child after env_update fork_epilogue child after clean_slate fork_epilogue child after line_cleanup fork_epilogue child after linetrace_dormant
FR_retired_branches_w_excp_intr FR_retired_x86_instr_w_excp_intr FR_retired_taken_branches_mispred FR_retired_taken_branches_mispred_addr_miscomp FR_retired_fastpath_double_op_instr FR_intr_masked_while_pending_cycles FR_dispatch_stall_branch_abort_to_retire FR_dispatch_stall_serialization FR_dispatch_stall_segment_load FR_dispatch_stall_reorder_buffer_full FR_dispatch_stall_resv_stations_full FR_dispatch_stall_waiting_all_quiet FR_dispatch_stall_far_ctl_trsfr_resync_branch_pend NB_mem_ctrlr_bypass_counter_saturation NB_mem_ctrlr_page_table_overflow LS_cancelled_store_to_load_fwd_ops NB_mem_ctrlr_dram_cmd_slots_missed CB_cpu_read_cmd_latency_to_target_0_to_3 CB_cpu_read_cmd_req_to_target_0_to_3 CB_cpu_read_cmd_latency_to_target_4_to_7 CB_cpu_read_cmd_req_to_target_4_to_7 CB_cpu_cmd_latency_to_target_0_to_7 BU_quadwords_written_to_system Intel Arch PerfMon v%d on Family %d Model %d See Chapter 19 of the "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2"
Order Number: 253669-047US, June 2013 See Chapter 19 of the "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide" See Chapter 19 of the "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2"
Order Number: 253669-045US, January 2013
The following i386/x86-64 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
x86-64 Disassemble in 64bit mode
i386 Disassemble in 32bit mode
i8086 Disassemble in 16bit mode
att Display instruction in AT&T syntax
intel Display instruction in Intel syntax
att-mnemonic (AT&T syntax only)
Display instruction with AT&T mnemonic
intel-mnemonic (AT&T syntax only)
Display instruction with Intel mnemonic
addr64 Assume 64bit address size
addr32 Assume 32bit address size
addr16 Assume 16bit address size
data32 Assume 32bit data size
data16 Assume 16bit data size
suffix Always display instruction suffix in AT&T syntax
amd64 Display instruction in AMD64 ISA
intel64 Display instruction in Intel64 ISA
Too many attributes defined in `%s' Missing value for attribute `%s' in `%s' Illegal value for attribute `%s' in `%s' out of memory, could not parse attributes
for `%s', allowable umask bits are: 0x%llx
`%s' attribute `%s' could not be set to 0x%llx
More than %d counters were specified
Data descriptor syntax error near `%s'
Negative interval specified for HW counter `%s'
Pentium Pro with MMX, Pentium II Intel Arch PerfMon v3 on Family 6 Model 26 Intel Arch PerfMon v3 on Family 6 Model 30 Intel Arch PerfMon v3 on Family 6 Model 31 Intel Arch PerfMon v3 on Family 6 Model 46 Intel Arch PerfMon v3 on Family 6 Model 37 Intel Arch PerfMon v3 on Family 6 Model 44 Intel Arch PerfMon v3 on Family 6 Model 47 Intel Arch PerfMon v3 on Family 6 Model 42 Intel Arch PerfMon v3 on Family 6 Model 45 Intel Arch PerfMon v3 on Family 6 Model 58 Intel Arch PerfMon v3 on Family 6 Model 62 Intel Arch PerfMon v3 on Family 6 Model 28 Intel Arch PerfMon v3 on Family 6 Model 60 Intel Arch PerfMon v3 on Family 6 Model 63 Intel Arch PerfMon v3 on Family 6 Model 69 Intel Arch PerfMon v3 on Family 6 Model 70 Intel Arch PerfMon v3 on Family 6 Model 61 Intel Arch PerfMon v3 on Family 6 Model 71 Intel Arch PerfMon v3 on Family 6 Model 79 Intel Arch PerfMon v3 on Family 6 Model 86 Intel Arch PerfMon v4 on Family 6 Model 78 Intel Arch PerfMon v4 on Family 6 Model 85 Intel Arch PerfMon v4 on Family 6 Model 94 ld_blocks_partial.address_alias dtlb_load_misses.miss_causes_a_walk dtlb_load_misses.walk_completed_4k dtlb_load_misses.walk_completed_2m_4m dtlb_load_misses.walk_completed_1g dtlb_load_misses.walk_completed uops_issued.vector_width_mismatch l2_rqsts.all_demand_references cpu_clk_thread_unhalted.ref_xclk cpu_clk_thread_unhalted.ref_xclk_any cpu_clk_thread_unhalted.one_thread_active l1d_pend_miss.pending_cycles_any dtlb_store_misses.miss_causes_a_walk dtlb_store_misses.walk_completed_4k dtlb_store_misses.walk_completed_2m_4m dtlb_store_misses.walk_completed_1g dtlb_store_misses.walk_completed dtlb_store_misses.walk_pending tx_mem.abort_hle_store_to_elided_lock tx_mem.abort_hle_elision_buffer_not_empty tx_mem.abort_hle_elision_buffer_mismatch tx_mem.abort_hle_elision_buffer_unsupported_alignment tx_mem.hle_elision_buffer_full offcore_requests_outstanding.demand_data_rd offcore_requests_outstanding.cycles_with_demand_data_rd offcore_requests_outstanding.demand_data_rd_ge_6 offcore_requests_outstanding.demand_code_rd offcore_requests_outstanding.cycles_with_demand_code_rd offcore_requests_outstanding.demand_rfo offcore_requests_outstanding.cycles_with_demand_rfo offcore_requests_outstanding.all_data_rd offcore_requests_outstanding.cycles_with_data_rd offcore_requests_outstanding.l3_miss_demand_data_rd offcore_requests_outstanding.cycles_with_l3_miss_demand_data_rd offcore_requests_outstanding.l3_miss_demand_data_rd_ge_6 itlb_misses.miss_causes_a_walk itlb_misses.walk_completed_2m_4m idq_uops_not_delivered.cycles_0_uops_deliv.core idq_uops_not_delivered.cycles_le_1_uop_deliv.core idq_uops_not_delivered.cycles_le_2_uop_deliv.core idq_uops_not_delivered.cycles_le_3_uop_deliv.core idq_uops_not_delivered.cycles_fe_was_ok cycle_activity.cycles_l1d_miss cycle_activity.stalls_l1d_miss exe_activity.exe_bound_0_ports dsb2mite_switches.penalty_cycles offcore_requests.demand_data_rd offcore_requests.demand_code_rd offcore_requests.l3_miss_demand_data_rd uops_executed.cycles_ge_1_uop_exec uops_executed.cycles_ge_2_uops_exec uops_executed.cycles_ge_3_uops_exec uops_executed.cycles_ge_4_uops_exec uops_executed.core_cycles_none uops_executed.core_cycles_ge_1 uops_executed.core_cycles_ge_2 uops_executed.core_cycles_ge_3 uops_executed.core_cycles_ge_4 offcore_requests_buffer.sq_full machine_clears.memory_ordering fp_arith_inst_retired.scalar_double fp_arith_inst_retired.scalar_single fp_arith_inst_retired.128b_packed_double fp_arith_inst_retired.128b_packed_single fp_arith_inst_retired.256b_packed_double fp_arith_inst_retired.256b_packed_single hle_retired.aborted_unfriendly rtm_retired.aborted_unfriendly mem_inst_retired.stlb_miss_loads mem_inst_retired.stlb_miss_stores mem_load_l3_hit_retired.xsnp_miss mem_load_l3_hit_retired.xsnp_hit mem_load_l3_hit_retired.xsnp_hitm mem_load_l3_hit_retired.xsnp_none dtlb_load_misses.walk_duration dtlb_load_misses.pde_cache_miss int_misc.recovery_cycles_occurrences dtlb_store_misses.walk_duration dtlb_store_misses.pde_cache_miss move_elimination.int_eliminated move_elimination.simd_eliminated move_elimination.int_not_eliminated move_elimination.simd_not_eliminated offcore_requests_outstanding.demand_data_rd_ge_6 offcore_requests_outstanding.demand_code_rd_cycles offcore_requests_outstanding.demand_rfo_cycles lock_cycles.split_lock_uc_lock_duration lock_cycles.cache_lock_duration br_inst_exec.nontaken_conditional br_inst_exec.taken_conditional br_inst_exec.taken_direct_jump br_inst_exec.taken_indirect_jump_non_call_ret br_inst_exec.taken_indirect_near_return br_inst_exec.taken_direct_near_call br_inst_exec.taken_indirect_near_call br_inst_exec.all_indirect_jump_non_call_ret br_inst_exec.all_indirect_near_return br_inst_exec.all_direct_near_call br_misp_exec.nontaken_conditional br_misp_exec.taken_conditional br_misp_exec.taken_indirect_jump_non_call_ret br_misp_exec.taken_return_near br_misp_exec.all_indirect_jump_non_call_ret br_misp_exec.taken_indirect_near_call uop_dispatches_cancelled.simd_prf uops_executed_port.port_0_core uops_executed_port.port_1_core uops_executed_port.port_2_core uops_executed_port.port_3_core uops_executed_port.port_4_core uops_executed_port.port_5_core uops_executed_port.port_6_core uops_executed_port.port_7_core cycle_activity.cycles_l2_pending cycle_activity.cycles_ldm_pending cycle_activity.cycles_no_execute cycle_activity.stalls_l2_pending cycle_activity.stalls_ldm_pending cycle_activity.cycles_l1d_pending cycle_activity.stalls_l1d_pending uops_retired.core_stall_cycles mem_uops_retired.stlb_miss_loads mem_uops_retired.stlb_miss_stores mem_load_uops_l3_hit_retired.xsnp_miss mem_load_uops_l3_hit_retired.xsnp_hit mem_load_uops_l3_hit_retired.xsnp_hitm mem_load_uops_l3_hit_retired.xsnp_none mem_load_uops_l3_miss_retired.local_dram tx_mem.abort_hle_elision_buffer_full br_misp_exec.taken_direct_near_call cycle_activity.cycles_l2_pending_cycles cycle_activity.cycles_ldm_pending_cycles cycle_activity.cycles_l1d_pending_cycles fp_comp_ops_exe.sse_fp_packed_double fp_comp_ops_exe.sse_fp_scalar_single fp_comp_ops_exe.sse_packed_single fp_comp_ops_exe.sse_scalar_double offcore_requests_outstanding.demand_data_rd_cycles offcore_requests_outstanding.all_data_rd_cycles br_inst_exec.taken_indirect_jmp_non_call_ret br_inst_exec.taken_return_near br_misp_exec.taken_indirect_jmp_non_call_ret uops_dispatched_port.port_2_ld uops_dispatched_port.port_2_sta uops_dispatched_port.port_3_ld uops_dispatched_port.port_3_sta cycle_activity.cycles_l2_pending_core cycle_activity.cycles_ldm_pending_core cycle_activity.cycles_l1d_pending_core cycle_activity.cycles_no_execute_core mem_trans_retired.precise_store mem_load_uops_retired.llc_miss mem_load_uops_llc_hit_retired.xsnp_miss mem_load_uops_llc_hit_retired.xsnp_hit mem_load_uops_llc_hit_retired.xsnp_hitm mem_load_uops_llc_hit_retired.xsnp_none mem_load_uops_llc_miss_retired.local_dram mem_load_uops_llc_miss_retired.remote_dram mem_load_uops_llc_miss_retired.remote_hitm mem_load_uops_llc_miss_retired.remote_fwd ld_blocks_partial.all_sta_block int_misc.recovery_stalls_count partial_rat_stalls.flags_merge_uop partial_rat_stalls.flags_merge_uop_cycles partial_rat_stalls.slow_lea_window partial_rat_stalls.mul_single_uop resource_stalls2.all_prf_control cycle_activity.cycles_no_dispatch l1d_blocks.bank_conflict_cycles other_assists.itlb_miss_retired mem_load_uops_misc_retired.llc_miss dtlb_load_misses.large_walk_completed mem_inst_retired.latency_above_threshold mem_uncore_retired.other_core_l2_hitm mem_uncore_retired.remote_cache_local_home_hit mem_uncore_retired.remote_dram fp_comp_ops_exe.sse_single_precision fp_comp_ops_exe.sse_double_precision l2_data_rqsts.prefetch.i_state l2_data_rqsts.prefetch.s_state l2_data_rqsts.prefetch.e_state l2_data_rqsts.prefetch.m_state dtlb_misses.large_walk_completed l1d_cache_prefetch_lock_fb_hit br_inst_exec.indirect_non_call br_inst_exec.indirect_near_call br_misp_exec.indirect_non_call br_misp_exec.indirect_near_call offcore_requests.l1d_writeback uops_executed.core_active_cycles_no_port5 uops_executed.core_active_cycles uops_executed.port015_stall_cycles ssex_uops_retired.packed_single ssex_uops_retired.scalar_single ssex_uops_retired.packed_double ssex_uops_retired.scalar_double ssex_uops_retired.vector_integer mem_load_retired.llc_unshared_hit mem_load_retired.other_core_l2_hit_hitm mem_uncore_retired.l3_data_miss_unknown mem_uncore_retired.uncacheable mem_uncore_retired.unknown_source offcore_requests_outstanding.demand.read_data offcore_requests_outstanding.demand.read_code offcore_requests_outstanding.demand.rfo offcore_requests_outstanding.any_read itlb_misses.large_walk_completed offcore_requests.demand.read_data offcore_requests.demand.read_code snoopq_requests_outstanding.data snoopq_requests_outstanding.invalidate snoopq_requests_outstanding.code mem_uncore_retired.other_core_l2_hit mem_uncore_retired.remote_hitm mem_uncore_retired.local_dram_remote_cache_hit mem_uncore_retired.other_llc_miss data_tlb_misses.l0_dtlb_miss_ld simd_uop_type_exec.arithmetic.s simd_uop_type_exec.arithmetic.ar br_inst_retired.pred_not_taken br_inst_retired.mispred_not_taken cycles_int_masked.cycles_int_masked cycles_int_masked.cycles_int_pending_and_masked simd_inst_retired.packed_single simd_inst_retired.scalar_single simd_inst_retired.packed_double simd_inst_retired.scalar_double simd_comp_inst_retired.packed_single simd_comp_inst_retired.scalar_single simd_comp_inst_retired.packed_double simd_comp_inst_retired.scalar_double mem_load_retired.l1d_line_miss rat_stalls.other_serialization_stalls %s: errno=%d
Lsun/misc/Launcher$AppClassLoader;
old handler could not be determined
event handler could not be installed
0x%p
old handler for signal %d could not be determined
(Ljava/lang/String;)Ljava/lang/String;
(Ljava/lang/String;Ljava/lang/String;)Ljava/lang/String; (Ljava/lang/String;)Ljava/net/URL; GPROFNG_JAVA_MAX_CALL_STACK_DEPTH <%s name="%s" format="binary"/>
<%s kind="%s" id="%d">TSD key not created
collector_util_init COL_ERROR_UTIL_INIT mmap: %s
collector_util_init COL_ERROR_UTIL_INIT munmap: %s
collector_util_init COL_ERROR_UTIL_INIT close: %s
collector_util_init COL_ERROR_UTIL_INIT open: %s
collector_util_init COL_ERROR_UTIL_INIT read: %s
collector_util_init COL_ERROR_UTIL_INIT write: %s
collector_util_init COL_ERROR_UTIL_INIT pwrite: %s
collector_util_init COL_ERROR_UTIL_INIT lseek: %s
collector_util_init COL_ERROR_UTIL_INIT access: %s
collector_util_init COL_ERROR_UTIL_INIT mkdir: %s
collector_util_init COL_ERROR_UTIL_INIT opendir: %s
collector_util_init COL_ERROR_UTIL_INIT closedir: %s
collector_util_init COL_ERROR_UTIL_INIT execv: %s
collector_util_init COL_ERROR_UTIL_INIT exit: %s
collector_util_init COL_ERROR_UTIL_INIT vfork: %s
collector_util_init COL_ERROR_UTIL_INIT waitpid: %s
collector_util_init COL_ERROR_UTIL_INIT getcontext: %s
collector_util_init COL_ERROR_UTIL_INIT malloc: %s
collector_util_init COL_ERROR_UTIL_INIT putenv: %s
collector_util_init COL_ERROR_UTIL_INIT getenv: %s
collector_util_init COL_ERROR_UTIL_INIT time: %s
collector_util_init COL_ERROR_UTIL_INIT mktime: %s
collector_util_init COL_ERROR_UTIL_INIT gmtime_r: %s
collector_util_init COL_ERROR_UTIL_INIT strtol: %s
collector_util_init COL_ERROR_UTIL_INIT strtoll: %s
collector_util_init COL_ERROR_UTIL_INIT setenv: %s
collector_util_init COL_ERROR_UTIL_INIT unsetenv: %s
collector_util_init COL_ERROR_UTIL_INIT atof: %s
collector_util_init COL_ERROR_UTIL_INIT clearenv: %s
COL_ERROR_UTIL_INIT fopen: %s
COL_ERROR_UTIL_INIT popen: %s
COL_ERROR_UTIL_INIT fclose: %s
collector_util_init COL_ERROR_UTIL_INIT pclose: %s
collector_util_init COL_ERROR_UTIL_INIT fgets: %s
collector_util_init COL_ERROR_UTIL_INIT sscanf: %s
collector_util_init COL_ERROR_UTIL_INIT snprintf: %s
collector_util_init COL_ERROR_UTIL_INIT vsnprintf: %s
collector_util_init COL_ERROR_UTIL_INIT atoi: %s
collector_util_init COL_ERROR_UTIL_INIT calloc: %s
collector_util_init COL_ERROR_UTIL_INIT free: %s
collector_util_init COL_ERROR_UTIL_INIT strdup: %s
collector_util_init COL_ERROR_UTIL_INIT strerror: %s
collector_util_init COL_ERROR_UTIL_INIT strerror_r: %s
collector_util_init COL_ERROR_UTIL_INIT strspn: %s
collector_util_init COL_ERROR_UTIL_INIT strtoul: %s
collector_util_init COL_ERROR_UTIL_INIT strtoull: %s
collector_util_init COL_ERROR_UTIL_INIT fcntl: %s
collector_util_init COL_ERROR_UTIL_INIT ioctl: %s
collector_util_init COL_ERROR_UTIL_INIT symlink: %s
collector_util_init COL_ERROR_UTIL_INIT syscall: %s
collector_util_init COL_ERROR_UTIL_INIT sysconf: %s
collector_util_init COL_ERROR_UTIL_INIT sigfillset: %s
collector_util_init COL_ERROR_UTIL_INIT sigprocmask: %s
x2APIC
APIC
__collector_open_experiment COLERROR_NOZMEM 1
__collector_open_experiment COLERROR: %d
__collector_open_experiment: COL_ERROR_BADDIR 1: `%s'
__collector_open_experiment: COL_ERROR_BADDIR 2: `%s'
__collector_open_experiment: COL_ERROR_BADDIR 3: `%s'
__collector_open_experiment: COL_ERROR_DIRPERM: `%s'
__collector_open_experiment: COL_ERROR_BADDIR 4: `%s'
__collector_open_experiment: COL_ERROR_LOG_OPEN
__collector_open_experiment: COL_ERROR_MKDIR: %s: errno = %d
mkdir(%s): errno=%d
__collector_open_experiment: COL_ERROR_TSD_INIT
TSD could not be initialized
__collector_open_experiment: COL_ERROR_EXP_OPEN
Experiment closed prematurely
TSD allocate failed
Archive command `%s'
data handle not created
build_experiment_path __collector_env_unset __collector_env_allocate env_prepend 8
.A C ? ??MU]emu8888888888888888}II ```pp@`I`@88 4= 4 T4 = = 8
QQQQQH
`
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